S6100 Design Notes

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== System Controller Chip == The heart of the S-6100 (besides the IM6100 CPU, that is) is an ATF2500 programmable logic device (PLD). This custom programmed 40 pin DIP chip ties together the functions of all the other subsystems on the CPU card. Using a PLD eliminates literally a couple of dozen discrete logic chips, and allows a much higher level of functionality to be implemented while reducing the part count. The reduced part count makes the S-6100 card easier to lay out, easier and cheaper to build, and easier to debug. And finally the programmable nature of the PLD allows the S-6100 functionality to be revised and enhanced, hardware bugs to be fixed, I/O ports to be remapped, and so on ''without'' any changes to the PC board. The functions of the SCC include - * Control logic for a KL8-E compatible console terminal interface * Panel memory extension to 32KW by implementing HD6120 style ''force zero'' and ''panel indirect'' flags * IM6100 RUN/HALT, power up reset and panel trap logic * PDP-8 IOT mapping to S-100 I/O transfers * S-100 bus interface logic * Logic to trap unimplemented IOTs to panel memory routines * Front panel control logic

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